The present disclosure relates generally to integrated circuit designs, and more particularly to methods for implementing a new bipolar-based silicon controlled rectifier for electrostatic discharge protection circuit.
The gate oxide of a metal-oxide-semiconductor (MOS) transistor of an integrated circuit is most susceptible to damage. The gate oxide may be destroyed by being contacted with a voltage only a few volts higher than the supply voltage. It is understood that a regular supply voltage in an integrated circuit is 5.0, 3.3 volts or even lower. Electrostatic voltages from common environmental sources can easily reach thousands, or even tens of thousands of volts. Such voltages are destructive even though the charge and any resulting current are extremely small. For this reason, it is of critical importance to discharge any static electric charge, as it builds up, before it accumulates to a damaging voltage.
It has been found that silicon controlled rectifier (SCR) can be one of the most effective devices for preventing electrostatic discharge (ESD) damage to chips due to its low turn-on impedance, low capacitance, low power dissipation, and high current sinking/sourcing capabilities. ESD protection circuitries that utilize SCR can enhance ESD protection for faster dissipation of ESD pulses during an ESD event before harmful charges can build up and damage the IC.
While methods for ESD protection circuit implemented with SCR are available, there are still flaws in traditional designs of SCRs used for ESD protection. In conventional SCRs used for ESD protection, buried layer and deep N+ collector sinkers are implemented at N-well to lower the collect resistance. These low resistance material can hinder the turn-on speed of the SCR, thus causing poor ESD performance.
Desirable in the art of integrated circuit designs are methods to improve the SCR and ESD performances of an ESD protection circuit.